voltage swing

Swing is the difference of maximum output voltage and minimum output voltage. Maximum possible swing in output you can have is VDD-VSS. where VDD is most positive voltage and VSS is most negative voltage. It does not mean that your swing is VDD-VSS. It may be smaller than this. This depends on circuit design.
For CMOS logic family it is VDD-GND. It means CMOS logic family have full voltage swing.

For example:

Question: op-amp741 why Voutmax= VCC-Vce(sat)13-Vbe14 ? Isn’t it:VCC-Vce(sat)14?

Answer: The output circuitry of op-amps have one transistor pulling the output pin up to +Vcc and another transistor that pulls the output pin down to -Vcc. So the output pin can only go to Vcc – VCE sat in each direction. It is unusual to run a “linear” amplifier right up to the output transistors saturation point, because the risk of lock up (negative feedback turning into positive), so it is safer to allow a margin between the Vout and the VCC.